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IS-1825ASRH
Data Sheet June 14, 2005 FN9065.1
Single Event and Total Dose Hardened, High-Speed, Dual Output PWM
The single event and total dose hardened IS-1825ASRH pulse width modulator is designed to be used in high frequency, switching power supplies in either voltage or current-mode configurations. The design includes a precision voltage reference, a low power start-up circuit, a high frequency oscillator, a wide-band error amplifier and a fast current-limit comparator. The use of proprietary process capabilities and unique design techniques results in fast propagation delay times and high output current over a wide range of output voltages. Constructed with the Intersil Rad-hard Silicon Gate (RSG) dielectrically isolated BiCMOS process, these devices are immune to single event latch-up and have been specifically designed to provide a high level of immunity to single event transients. All specified parameters are guaranteed and tested for 300krad(Si) total dose performance. Detailed Electrical Specifications for these devices are contained in SMD 5962-02511. A "hot-link" is provided on our website for downloading the SMD.
Features
* Electrically Screened to DSCC SMD # 5962-02511 * QML Qualified per MIL-PRF-38535 Requirements * Radiation Environment - Total Dose. . . . . . . . . . . . . . . . . . . . . 300krad(SI) (max) - Latch-up Immune . . . . . . . . . . . . . Dielectrically Isolated - SEU immune . . . . . . . . . . . LET=35MeV/mg/cm2(max) * Oscillator Frequency . . . . . . . . . . . . . . . . . . . .1MHz(max) * High Output Drive Current . . . . . . . . . . . . . . .1A peak(typ) * Low Start-up Current . . . . . . . . . . . . . . . . . . . 300A(max) * Undervoltage Lockout - Start Threshold . . . . . . . . . . . . . . . . . . . . . . . .8.8V(max) - Stop Threshold . . . . . . . . . . . . . . . . . . . . . . . . 7.6V(min) - Hysteresis. . . . . . . . . . . . . . . . . . . . . . . . . . 300mV(min) * Improved Soft-Start Function Compared with Commercial 1825A Types * Pulse-by-Pulse Current Limiting * Latched Overcurrent Comparator with Full Cycle Restart * Programmable Leading Edge Blanking
Pinout
IS1-1825ASRH (CDIP2-T16 SBDIP) TOP VIEW
INV 1 NON-INV 2 E/A OUT 3 CLK/LEB 4 RT 5 CT 6 RAMP 7 SS 8 16 VREF 15 VCC 14 OUT B 13 VC 12 PGND 11 OUT A 10 GND 9 ILIM/SD
Applications
* Voltage or Current-Mode Switching Power Supplies * Control of High Current MOSFET Drivers * Motor Speed and Direction Control
Ordering Information
ORDERING NUMBER 5962F0251101QEC 5962F0251101QXC 5962F0251101VEC
VREF VCC OUT B PGND VC VC PGND OUT A GND
ILIM/SD
INTERNAL MKT. NUMBER IS1-1825ASRH-8 IS9-1825ASRH-8 IS1-1825ASRH-Q IS9-1825ASRH-Q IS1-1825ASRH/Proto IS9-1825ASRH/Proto
TEMP. RANGE (C) -50 to 125 -50 to 125 -50 to 125 -50 to 125 -50 to 125 -50 to 125
IS9-1825ASRH (CDFP4-F20 FLATPACK) TOP VIEW
NC
INV
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
5962F0251101VXC IS1-1825ASRH/Proto IS9-1825ASRH/Proto
NON-INV E/A OUT CLK/LEB RT CT RAMP SS NC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002, 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
IS-1825ASRH Die Characteristics
DIE DIMENSIONS: 4310m x 5840m (170 mils x 230 mils) Thickness: 483m 25.4m (19 mils 1 mil) INTERFACE MATERIALS Glassivation Type: Phosphorus Silicon Glass (PSG) Thickness: 8.0kA +/- 1.0kA Top Metallization Type: AlSiCu Thickness: 16.0kA +/- 2kA Substrate: Radiation Hardened Silicon Gate, Dielectric Isolation Backside Finish: Silicon ASSEMBLY RELATED INFORMATION Substrate Potential: Unbiased (DI) ADDITIONAL INFORMATION Worst Case Current Density: <2.0 x 105 A/cm2 Transistor Count: 585
Metallization Mask Layout
IS-1825ASRH
RT CT RAMP SS ILIM/SD OGND GND
CLK/LEB E/A OUT NON-INV INV
VREF
VCC
OUT A
OUT B
PGND VC VC Notes: 1. Both the OGND (oscillator ground) and the GND (control circuit ground) pads must be bonded to ground. These pads are both bonded to the GND pin on the packaged devices. 2. All double-sized bond pads must be double bonded for current sharing purposes.
PGND
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 2
FN9065.1 June 14, 2005


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